Tomachie

AI-driven design hardening and manufacturing readiness for PCB schematics.

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Example Design Review Documents

Standard ERC looks at nets. Tomachie looks at paths — verifying differential pair integrity and impedance continuity across the entire signal chain, even through passive components and connectors. It finds what's hidden: mischaracterized pins, broken impedance paths, and invisible property errors that break your layout wizards. These pre-generated reports show the full analysis output, each containing 10,000+ words of DFT analysis, EMC checks, PCOLA-SOQ scoring, connector pinouts, and testpoint coverage documentation:

Tomachie versionReportDescription
v5.139caiman Design ReviewOpen-source KiCad design
v5.138CM4S_CORE Design ReviewKiCad carrier for the Raspberry Pi Compute Module 4S — Ethernet, HDMI, USB, microSD, relays
v5.137Ivy / Ivy Plus Design ReviewAltium carrier for a Toradex Verdin SoM — two variants, Gigabit Ethernet, USB 3.0 hub, LTE, isolated CAN/RS-485 and analog I/O
v5.110Orange Pi CM5 Carrier Design ReviewKiCad carrier for the Orange Pi CM5 compute module with a TI DP83867 Gigabit Ethernet PHY
v5.74psu-ext Design ReviewOpen-hardware KiCad power-measurement board — ESP32-S3, ADS1115 ADC, INA240 current sense, isolated I2C
v2.6generic pan-tilt motor PCB Design ReviewKiCad motor-control board from an open-source pan-tilt project
v1.87FPGA1394V3 Design ReviewIEEE 1394 FireWire interface with Xilinx XC7Z020 FPGA, BSDL boundary scan analysis, JTAG chain validation
v1.81Orthrus-TX Design ReviewKiCad transmitter board project
v1.81STM32H733 Design ReviewKiCad design with STM32H7-series microcontroller
v1.81sinthinator Design ReviewKiCad project from open-source hardware
v1.79vme-wren Design ReviewCERN White Rabbit VME
v1.11MB1191 Design ReviewSTM32 Nucleo-144 development board with ARM Cortex-M processor
v1.11TIDA-050036 Design ReviewTexas Instruments industrial base board reference design

FPGA1394V3 report: العربية · 简体中文 · Deutsch · Español · Français · עברית · Italiano · 日本語 · 한국어 · Polski · Português · Русский · ไทย · Türkçe · 繁體中文 · Tiếng Việt

Samples You Can Try

  • FPGA1394V3.zip — IEEE 1394 FireWire interface with Xilinx FPGA, multi-sheet hierarchy
  • MB1191.zip — STM32 Nucleo-144 development board (ST Microelectronics)
  • TIDA-050036.zip — Texas Instruments industrial base board reference design

Download any sample, upload it on the Submit page, and receive a full analysis report.

Sample Report Output

Tomachie generates an interactive HTML report with navigable sections. Here's what you'll receive:

Switch DFT Analysis report showing configuration switches without test override capability, isolation resistor calculations for ATE compatibility, and BOM impact recommendations for adding 0201 resistors per controlled signal

Switch DFT analysis — identifies configuration switches lacking test override capability, calculates isolation resistor values for ATE compatibility.

Testpoint inventory report showing power rail coverage analysis with VCC, GND, and signal test points listed by net name, reference designator, and coverage status

Testpoint inventory with power rail coverage analysis — every power net checked for test access.

EMC Design Checks showing connector shell grounding analysis, library validation grades, footprint model audit with pass/fail status for each component

EMC design checks, component library validation, and footprint/model audit — all in one report.

The left navigation panel lets you jump directly to any section. Reports include Design Summary, Pin Connectivity, Memory Interfaces, Serial Interfaces, Connector Pinouts, DFT Analysis, Library Quality grades, and more.

Current Focus: Digital and mixed-signal designs — processors, FPGAs, memory interfaces, serial buses, and testability analysis. Analog-specific checks (power supply loop stability, filter analysis) are on the roadmap.

What to Upload

ZIP your schematic files and upload. Here's what we need:

Schematic files (required)

Altium .SchDoc or KiCad .kicad_sch files — include all sheets referenced by the hierarchy.

Project files (recommended)

Altium: .PrjPcb, .PrjPcbStructure, .PrjPcbVariants. KiCad: .kicad_pro. These tell us the hierarchy and top-level sheet. Without them, you'll need to specify the top sheet name, or we'll assume a flat design.

*.bsdl files (optional)

Boundary Scan Description Language files. These files use IEEE 1149.1-2013 to describe the test capability of the digital ICs. If provided, Tomachie will analyze the correctness, compliance and Design-for-Test of your design.

Tip: When requesting schematics from a designer or contractor, ask for the project files (.PrjPcb or .kicad_pro) along with the schematic files. Many designers forget to include them.