An authoritative AI-assisted PCB design review
Articles and videos on AI powered PCB design, PCB schematic quality and PCB design for testability (DFT).
AntMicro's Jetson Thor carrier board scored 47/100: a wiring error on I2C, lack of short circuit protection, a deficiency in the USB PD design and no protection for a software ask above the strapped voltage.
Read the articleBlackwing Space's Raspberry Pi CM5 carrier scored 83/100, but several places show power is shallow to run two cameras at the same time. The report was $44.
Read the articleTestability reviews with ODB++ and Gerber files come too late and create work for PCB designers. Three new approaches analyze testability from the schematic, before layout, without knowing the factory floor.
Watch the videoAn accurate, interactive power tree auto-generated from Petr Dvořák's CM4S carrier schematic, with a drawIO file we hope you will never need. For Altium, KiCad, Capture CIS and EasyEDA.
Read the articleInteractive, hierarchical power tree documentation drawn from Maxim Pavlov's PSU-EXT KiCad schematic, with a drawIO file the designer can annotate and put back into the report, plus pre-layout DC power integrity.
Read the articleOur GitHub fork of KiPI, the open-source power integrity analyzer for KiCad: a pdn.json power-tree import, now part of KiPI 0.8.0 itself, plus worst-case DC solves and INCOMPLETE marking for loads with unknown currents. Shown on a Raspberry Pi CM4S carrier.
Read the articleOur GitHub fork of FYPA, the DC power integrity / IR-drop tool that reads Altium projects directly: split planes, non-synchronous bucks, regulator modeling, load switches, a worst-case corner, and a reader that loads the 200+ power-tree values from a Tomachie .json file.
Read the articleA new plugin adds a Tomachie button to KiCad 10's schematic editor. One click sends the schematic sheets and project file for test-point insertion, DFT checks and an optional AI review, without zipping and uploading by hand.
Get the pluginA real Raspberry Pi CM4S carrier board schematic taken through a full PCB design review with the engineer who designed it — and the same review applies to a CM4 carrier or a CM5 carrier: preliminary report and score, then the AI pass against component datasheets and derating rules.
Watch the seriesIPC-7351B and IPC-7251 put pin 1 on the diode cathode and on the capacitor +. Footprints are built that way, so symbols have to match — and it costs real time in manufacturing, debug and test when they do not.
Read the articleAutomated schematic design review before layout: quality gate, test point insertion, and AI datasheet checks. Subtitles in 17 languages.
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